Frederick Walls is a Fellow at AMD, focusing on system architecture for AMD’s industry-leading display engine. He currently serves as the co-chair of the 10E Essence Technology Committee and co-chair of the ETC Joint Task Force on AI & Media. He previously served as the co-chair of the 31FS File Formats & Systems Technology Committee and led the development of the DPX extensions for HDR and associated reference materials. Walls has made significant technical contributions in the HDMI Forum, advancing features such as Source-Based Tone Mapping, and has participated in many other standards organizations. He was the primary developer and main author of the widely deployed VESA Display Stream Compression (DSC) standard. Before joining AMD in 2022, Walls worked at Broadcom for 23 years on machine learning and video architecture for set-top box ICs. He is listed as an inventor on 29 issued U.S. patents and has authored eight papers. He is a member of the Society for Information Display, and he received Bachelor of Science and Master of Engineering degrees in Electrical Engineering and Computer Science from MIT.